
BD8119FM-M
VCC
VCC
CPC2
Technical Note
CIN1
CIN2
CPC1
RPC1
1. COMP
28. VREG
CCS
RCS1 RCS2 RCS3
VREG
CSS
2. SS
27. BOOT
RCS5
CREG
EN
SW1
3. VCC
4. EN
5. RT
26. CS
25. OUTH
24. SW
G
M1
D
S
CBT
L1
D2
VOUT
CRT
RRT
SYNC
CIN3
6. SYNC
7. GND
23. DGND
22. OUTL
D1
G
M2
D
S
COUT1 COUT2
ROVP2
ROVP1
VREG
FIN. FIN
FIN. FIN
PWM
8. PWM
21. FBR
FAIL1
RFL2 RFL1
9. FAIL1
20. PGND
CISET
FAIL2
10. FAIL2
19. ISET
RDAC
VREG
VREG
SW2
11. LEDEN1
18. VDAC
RISET
VDAC
SW3
12. LEDEN2
17. OVP
13. LED1
14. LED2
16. LED4
15. LED3
LED4
LED3
LED1
LED2
● The coupling capacitors CVCC and CREG should be mounted as close as possible to the IC’s pins.
● Large currents may pass through DGND and PGND, so each should have its own low-impedance
routing to the system ground.
● Noise should be minimized as much as possible on pins VDAC, ISET,RT and COMP.
● PWM, SYNC and LED1-4 carry switching signals, so ensure during layout that surrounding traces are
not affected by crosstalk.
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2011.08 - Rev.B